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SCD5580A YELLOW SCD5581A HIGH EFFICIENCY RED SCD5582A Slimline GREEN SCD5583A HIGH EFFICIENCY GREEN SCD5584A
STANDARD RED 0.145" 8-Character 5 x 5 Dot Matrix Serial Input Dot Addressable Intelligent Display(R) Devices
Dimensions in inches (mm) 1.500 max. (38.10) .100 .187 (.47) (2.54) .050 (1.27) typ. .394 .006 (10.0 .15) .300.020 0.200 1.312 ref. (7.62.51) 2 (33.32) EIA date code (5.08) Intensity Code SCD-558XA Hue Category Z Y OSRAM YYWW Seating Plane .020 (.51) typ. .100 -.010 typ. (2.54 -.25) .100 (2.54) 0.160.02 Tol. non-cum. 2 (4.06 .51) 1.300 ref. (33.02) 2 0.145 .033 (0.84) (3.68) 28 27 26 25 24 23 22 21 2019 18 1716 15 Pin 1 Indicator .022 (0.56)
1 2 3 4 5 6 7 8 9 10 11 12 1314
0.145 (3.68)
.010(0.25) .012 (.30) typ.
FEATURES * Low Profile Package: 60% Smaller than Industry Standard 8-Digit Display * Eight 0.145" (3.68 mm) 5 x 5 Dot Matrix Characters in Red, Yellow, High Efficiency Red, Green, or High Efficiency Green * Optimum Display Surface Efficiency (display area to package ratio) * Low Power--30% Less Power Dissipation than 5 x 7 Format * High Speed Data Input Rate: 5.0 MHz * ROMless Serial Input, Dot Addressable Display-- Ideal for User Defined Characters * Built-in Decoders, Multiplexers and LED Drivers * Readable from 6.0 feet (1.8 meters) * Wide Viewing Angle, X Axis 55, Y Axis 65 * Attributes: - 200 Bit RAM for User Defined Characters - Eight Dimming Levels - Power Down Mode (<250 W) - Hardware/Software Clear Function - Lamp Test * Internal or External Clock * End-Stackable Dual-In-Line Plastic Package * 3.3 V Capability
Notes: Unless otherwise specified 1. Tolerances .XXX .010(0.254) 2 Dimension at seating plane 3. Lead Dim. 0.018 wide x 0.012 thk.
DESCRIPTION The SCD5580A (Red), SCD5581A (Yellow), SCD5582A (HER), SCD5583A (Green) and SCD5584A (HEG) are eight digit dot addressable 5 x 5 matrix, Serial Input, Intelligent Display devices. The eight 0.145" (3.68 mm) high digits are packaged in a transparent, 0.3" pin spacing plastic DIP. The on-board CMOS has a 200 bit RAM, (one bit associated with one LED), to generate User Defined Characters. Due to the reduced LED count, power requirement and heat dissipation are reduced by 30%. Additionally in Power Down Mode quiescent current is <50 A.
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1
March 23, 2000-18
DESCRIPTION (continued) The SCD558XA is designed to work with the Serial port of most common microprocessors. The Clock I/O (CLK I/O) and Clock Select (CLKSEL) pins offer the user the capability to supply a high speed external clock. This feature can minimize audio band interference for portable communication equipment or eliminate the visual synchronization effects found in high vibration environments such as avionics equipment. Maximum Ratings DC Supply Voltage ............................................-0.5 to +7.0 Vdc Input Voltage Levels Relative to Ground ............................................... -0.5 to VCC +0.5 Vdc Operating Temperature ....................................-40 C to +85C Storage Temperature.......................................-40 C to +100C Maximum Solder Temperature 0.063" below Seating Plane, t<5 s ................................ 260C Relative Humidity at 85C .................................................. 85% Maximum Number of LEDs on at 100% Brightness............ 128 IC Junction Temperature .................................................. 125C ESD (100 pF, 1.5 k)......................................................... 2.0 kV Max SDCLK frequency ................................................ 5.0 MHz Figure 1. Data Write Cycle
3.5 V LOAD TLDS DATA TDS TDH SDCLK TSDCW TSDCW 3.5 V 1.5 V TLDH 3.5 V 1.5 V 1.5 V
TSDCLK Period
Figure 2. Instruction Cycle
TWR
TBL
LOAD SDCLK DATA LOAD SDCLK DATA D0 D1 D2 D3 D4 D5 D6 D7 D0 D0 D1 D2 D3 OR D4 D5 D6 D7 D0
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SCD5580/1/2/3/4 A
2
March 23, 2000-18
Figure 3. Top View
28 15
1 Character 0
14 Character 7
Electrical Characteristics at 25C Parameter VCC ICC (Pwr Dwn Mode) (1)(2) ICC 8 digits(3) 16 dots/character IIL Input current IIH Input current VIH VIL IOH (CLK I/O) IOL (CLK I/O) J-pin Fext External Clock Input Frequency Fosc Internal Clock Input Frequency Clock I/O Bus Loading Clock Out Rise Time Clock Out Fall Time Digit Multiplex Frequency
Notes:
1) 2)
Min. 4.5 -- -- -- -- 3.5 -- -- -- -- 120 120 -- -- -- 375
Typ. 5.0 5.0 200 -- -- -- -- -8.9 1.6 35 -- -- -- -- -- 768
Max. 5.5 -- 240 -10 10 -- 1.5 -- -- -- 347 347 240 500 500 1086
Units V A mA A A V V mA mA C/W kHz kHz pF ns ns Hz
Conditions -- VCC=5.0 V, all inputs=0 V or VCC VCC=5.0 V, "#" displayed in all 8 digits at 100% brightness at 25C VCC=5.0 V, VIN=0 (all inputs) VCC=VIN=5.0 V (all inputs) VCC=4.5 V to 5.5 V VCC=4.5 V to 5.5 V VCC=4.5 V, VOH=2.4 V VCC=4.5 V, VOL=0.4 V -- VCC=5.0 V, CLKSEL=0 VCC=5.0 V, CLKSEL=1.0 -- VCC=4.5 V, VOH=2.4 V VCC=4.5 V, VOH=0.4 V --
When an external clock is used it must be stopped. Unused inputs must be tied high. 3) Peak current 5/3 x I CC.
Input/Output Circuits Figures 5 and 6 show the input and output resistor/diode networks used for ESD protection and to eliminate substrate latch-up caused by input voltage over/under shoot. Figure 4. Inputs VCC input 1 K
input/output
Figure 5. Clock I/O VCC
1 K
GND
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GND
SCD5580/1/2/3/4 A
3
March 23, 2000-18
Optical Characteristics at 25C (VCC=5.0 V at 100% brightness level, viewing angle: X axis 55, Y axis 65) Red SCD5580A Description Luminous Intensity Peak Wavelength Dominant Wavelength Yellow SCD5581A Description Luminous Intensity Peak Wavelength Dominant Wavelength High Efficiency Red SCD5582A Description Luminous Intensity Peak Wavelength Dominant Wavelength Green SCD5583A Description Luminous Intensity Peak Wavelength Dominant Wavelength High Efficiency Green SCD5584A Description Luminous Intensity Peak Wavelength Dominant Wavelength Symbol IV
peak dom
Symbol IV
peak dom
Min. 36 -- --
Typ. 90 660 639
Units cd/dot nm nm
Symbol IV
peak dom
Min. 124 -- --
Typ. 213 583 585
Units cd/dot nm nm
Symbol IV
peak dom
Min. 124 -- --
Typ. 265 630 626
Units cd/dot nm nm
Symbol IV
peak dom
Min. 124 -- --
Typ. 221 565 570
Units cd/dot nm nm
Min. 124 -- --
Typ. 505 568 574
Units cd/dot nm nm
Notes: 1. Dot to dot intensity matching at 100% brightness is 1.8:1. 2. Displays are binned for hue at 2.0 nm intervals. 3. Displays within a given intensity category have an intensity matching of 1.5:1 (max.).
2000 Infineon Technologies Corp. * Optoelectronics Division * San Jose, CA www.infineon.com/opto * 1-888-Infineon (1-888-463-4636) OSRAM Opto Semiconductors GmbH & Co. OHG * Regensburg, Germany www.osram-os.com * +49-941-202-7178
SCD5580/1/2/3/4 A
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March 23, 2000-18
Pin Assignment Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Function SDCLK LOAD NP NP NP NP NP NP NP NP NP NP RST GND Pin 28 27 26 25 24 23 22 21 20 19 18 17 16 15 Function GND DATA NP NP NP NP NP NP NP VCC NC NP CLKSEL CLK I/O
Pin Definitions Pin 1 Function SDCLK Definitions Loads data into the 8-bit serial data register on a low to high transition. Low input enables data clocking into 8-bit serial shift register. When LOAD goes high, the contents of 8-bit serial Shift Register will be decoded. No pin No pin No pin No pin No pin No pin No pin No pin No pin No pin Asynchronous input, when low will clear the Multiplex Counter, User RAM and Data Register. Control Word Register is set to 100% brightness and the Address Register is set to select Digit 0. The display is blanked. Power supply ground Outputs master clock or inputs external clock. H=internal clock, L=external clock No pin No connection Power supply No pin No pin No pin No pin No pin No pin No pin Serial data input Power supply ground
2
LOAD
3 4 5 6 7 8 9 10 11
NP NP NP NP NP NP NP NP NP NP RST
Switching Specifications (TA=25C and VCC=4.5 V to 5.5 V) Symbol TRC TLDS TDS TSDCLK TSDCW TLDH TDH TWR TBL Description Reset Active Time Load Setup Time Data Setup Time Clock Period Clock Width Load Hold Time Data Hold Time Total Write Time Time Between Loads Min. 600 40 40 200 70 0 20 2.2 600 Units ns ns ns ns ns ns ns s ns
12 13
14 15 16 17 18 19 20
GND CLK I/O CLKSEL NP NC VCC NP NP NP NP NP NP NP DATA GND
Note: SDCLK duty cycle=30% Min. and 50% Max.
Figure 6. Dot Matrix Format
0.033 (0.84) typ. 0.100 (2.54) C0 C1 C2 C3 C4 R0 R1 R2 R3 0.011 (0.28) typ. R4 0.022 (0.56) typ. 0.145 (3.68)
21 22 23 24 25 26 27
Dimensions in inches (mm) in inches (mm) Dimensions Tolerance: .XXX=.010 (.25) TOLERANCE: .XXX=.010 (.25)
28
2000 Infineon Technologies Corp. * Optoelectronics Division * San Jose, CA www.infineon.com/opto * 1-888-Infineon (1-888-463-4636) OSRAM Opto Semiconductors GmbH & Co. OHG * Regensburg, Germany www.osram-os.com * +49-941-202-7178
SCD5580/1/2/3/4 A
5
March 23, 2000-18
Display Column and Row Format C0 Row 0 Row 1 Row 2 Row 3 Row 4 1 0 0 0 0 C1 1 0 0 0 0 C2 1 1 1 1 1 C3 1 0 0 0 0 C4 1 0 0 0 0
1=Display dot "On" 0=Display dot "Off'
Operation of the SCD558XA The display consists of 2 CMOS ICs containing control logic and drivers for eight 5 x 5 characters. These components are assembled in a compact (38 mm x 10 mm) plastic package. Individual LED dot addressablity allows the user great freedom in creating special characters or mini-icons. The User Definable Character Set Examples illustrate 200 different character and symbol possibilities. The use of a serial data interface provides a highly efficient interconnection between the display and the mother board. The SCD558XA requires only 4 lines as compared to 15 for an equivalent 8 character parallel input part. The on-board CMOS ICs are the electronic heart of the display. The IC accepts decoded serial data, which is stored in the internal RAM. Asynchronously the RAM is read by the character multiplexer at a strobe rate that results in a flicker free display. Figure 7 shows the three functional areas of the ICs. These include: the input serial data register and control logic, a 200 bits two port RAM, and an internal multiplexer/display driver.
Column Data Ranges Row 0 Row 1 Row 2 Row 3 Row 4 00H to 1FH 20H to 3FH 40H to 5FH 60H to 7FH 80H to 9FH
Figure 7. SCD558X Block Diagram
I.C. #1 RST CLK i/O CLKSEL DISPLAY OSC. +64 Counter +5 Counter MUX Rate ROW CONTROL LOGIC & ROW DRIVERS 0 ROW 0-4 (DIGIT 0-3) 1 2 3 4 5 6 7
COLUMN DRIVERS FOR DIGIT 0 TO 3
8 bit Serial Register
Y Address Decode
DATA SDCLK LOAD
USER RAM MEMORY
COL 0-19
X adress Deode 4 Bit Address Register 4 Bit Control Word Reg. Control Word Logio COL 0-19 (DIGITS 4-7) I.C. #2 ROW 0-4 (DIGITS 4-7)
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SCD5580/1/2/3/4 A
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March 23, 2000-18
The following explains how to format the serial data to be loaded into the display. The user supplies a string of bit mapped decoded characters. The contents of this string is shown in Figure 8a. Figure 8b shows that each character consist of six 8 bit words. The first word encodes the display character location and the succeeding five bytes are row data. The row data represents the status (On, Off) of individual column LEDs. Figure 9c shows that each that each 8 bit word is formatted to include a three bit Operational Code (OPCODE) defined by bits D7-D5 and five bits (D4-D0) representing Column Data, Character Address, or Control Word Data. Figure 8d shows the sequence for loading the bytes of data. Bringing the LOAD line low enables the serial register to accept data. The shift action occurs on the low to high transition of the serial data clock (SDCLK). The least significant bit (D0) is loaded first. After eight clock pulses the LOAD line is brought high. With this transition the OPCODE is decoded. The decoded OPCODE directs D4-D0 to be latched in the Character Address register, stored in the RAM as Column data, or latched in the Control Word register. The control IC requires a minimum 600 ns delay between successive byte loads. As indicated in Figure 8a, a total of 528 bits of data are required to load all eight characters into the display. Figure 8. Loading Serial Character Data
The Character Address Register bits, D4-D0 (Table 2), and Row Address Register bits, D7-D5 (Table 3), direct the Column Data bits, D4-D0 (Table 3) to specific RAM location. Table 1 shows the Row Address for the example character "D." Column data is written and read asynchronously from the 200 bit RAM. Once loaded the internal oscillator and character multiplexer reads the data from the RAM. These characters are row strobed with column data as shown in Figures 10 and 11. The character strobe rate is determined by the internal or user supplied external MUX Clock and the IC's /320 counter. Table 1. Character "D" Op code D7 D6 D5 Row 0 Row 1 Row 2 Row 3 Row 4 0 0 0 0 1 0 0 1 1 0 0 1 0 1 0 Column Data D4 D3 D2 D1 D0 C0 C1 C2 C3 C4 1 1 1 1 1 1 0 0 0 1 1 0 0 0 1 1 0 0 0 1 0 1 1 1 0 Hex
1E 31 51 71 9E
Example: Serial Clock = 5 MHz, Clock Period = 200 ns
528 Clock Cycles, 105.6 s
a.
Character 0
Character 1
Character 2
Character 3
Character 4
Character 5
Character 6
Character 7
D5
66 Clock Cycles, 13.2 s
b.
Character 0 Address
Row 0 Column Data
Row 1 Column Data
Row 2 Column Data
Row 3 Column Data
Row 4 Column Data
11 Clock Cycles, 2.2 s
11 Clock Cycles, 2.2 s
c.
Column Data Character Address Time OPCODE Time OPCODE D0 D1 D2 D3 D4 D5 D6 D7 Between D0 D1 D2 D3 D4 D5 D6 D7 Between Loads Loads 00 0 0 0 1 0 1 600 ns(min.) C4 C3 C2 C1 C0 600 ns(min.)
LOAD
Clock Period
Serial Clock
d.
DATA D0 D1 D2 D3 D4 D5 D6 D7
Time between LOADS
t0
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SCD5580/1/2/3/4 A
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March 23, 2000-18
Table 2. Load Character Address Op code D7 D6 D5 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 Character Address D4 D3 D2 D1 D0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 Hex A0 A1 A2 A3 A4 A5 A6 A7 Operation Load Character 0 Character 1 Character 2 Character 3 Character 4 Character 5 Character 6 Character 7
Table 4. Display Brightness Op code D7 D6 D5 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Control Word D4 D3 D2 D1 D0 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 1 1 0 0 1 0 1 0 1 0 1 0 Hex F0 F1 F2 F3 F4 F5 F6 Operation Level 100% 53% 40% 27% 20% 13% 6.6%
Table 5. Power Down Table 3. Load Column Data Op code D7 D6 D5 0 0 0 0 1 0 0 1 1 0 0 1 0 1 0 Column Data D4 D3 D2 D1 D0 C0 C1 C2 C3 C4 C0 C1 C2 C3 C4 C0 C1 C2 C3 C4 C0 C1 C2 C3 C4 C0 C1 C2 C3 C4 Operation Load Row 0 Row 1 Row 2 Row 3 Row 4 Op code D7 D6 D5 1 1 1 Control Word D4 D3 D2 D1 D0 1 1 1 1 1 Hex FF Operation Level 0% brightness
The Lamp Test is enabled by loading F8 HEX, Table 6, into the serial shift register. This Control Word sets all of the LEDs to a 53% brightness level. Operation of the Lamp Test has no affect on the RAM and is cleared by loading a Brightness Control Word. Table 6. Lamp Test Op code D7 D6 D5 1 1 1 1 1 1 Control Word D4 D3 D2 D1 D0 1 1 0 1 B 0 B 0 B 0 F8 Hex Operation Level Lamp Test (OFF) Lamp Test (ON)
The user can activate four Control functions. These include: LED Brightness Level, Lamp Test, IC Power Down, or Display Clear. OPCODEs and five bit words are used to initiate these functions. The OPCODEs and Control Words for the Character Address and Loading Column Data are shown in Tables 2 and 3. The user can select seven specific LED brightness levels, Table 4. These brightness levels (in percentages of full brightness of the display) include: 100% (F0 HEX), 53% (F1HEX), 40% (F2HEX), 27% (F3HEX), 20% (F4HEX), 13% (F5HEX), and 6.6% (F6HEX). The brightness levels are controlled by changing the duty factor of the row strobe pulse. The SCD558XA offers a unique Display Power Down feature which reduces ICC to less than 50 A. When FFHEX is loaded, as shown in Table 5, the display is set to 0% brightness and the internal multiplex clock is stopped. When in the Power Down mode data may still be written into the RAM. The display is reactivated by loading a new Brightness Level Control Word into the display. Figure 9. Row and Column Location
The Software Clear (C0HEX), given in Table 7, clears the Address Register and the RAM. The display is blanked and the Character Address Register will be set to Character 0. The internal counter and the Control Word Register are unaffected. The Software Clear will remain active until the next data input cycle is initiated. Table 7. Software Clear Op code D7 D6 D5 1 1 0 Control Word D4 D3 D2 D1 D0 0 0 0 0 0 Hex C0 Operation Level CLEAR
Row 0 Row 1 Row 2 Row 3 Row 4 01234 Columns
off LED on LED Previously "on" LED
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SCD5580/1/2/3/4 A
8
March 23, 2000-18
Figure 10. Row Strobing
ROW LOAD Row 0 Row 1 Row 2 Row 3 Row 4 01234 Columns LOAD ROW 0 Row 0 Row 1 Row 2 Row 3 Row 4 01234 Columns LOAD ROW 1 Row 0 Row 1 Row 2 Row 3 Row 4 01234 Columns LOAD ROW 2 Row 0 Row 1 Row 2 Row 3 Row 4 01234 Columns LOAD ROW 3 Row 0 Row 1 Row 2 Row 3 Row 4 01234 Columns LOAD ROW 4
Multiplexer and Display Driver The eight characters are row multiplexed with RAM resident column data. The strobe rate is established by the internal or external MUX Clock rate. The MUX Clock frequency is divided by a 320 counter chain. This results in a typical strobe rate of 750 Hz. By pulling the Clock SEL line low, the display can be operated from an external MUX Clock. The external clock is attached to the CLK I/O connection (pin 15). The maximum external MUX Clock frequency should be limited to 1.0 MHz. An asynchronous hardware Reset (pin 13) is also provided. Bringing this pin low will clear the Character Address Register, Control Word Register, RAM, and blanks the display. This action leaves the display set at Character Address 0, and the Brightness Level set at 100%. Thermal Considerations The SCD558XA has been designed to provide lowest thermal resistance from the CMOS to the ground pin. The heat is then conducted through the traces on the users circuit board to free air. The max. IC operating temperature is 125C. Maximum. IC junction temperature is calculated using the following equation: TJ (IC) Max.=TA+(PD Max.) (RJ-PIN+RPIN-A) where RJ-PIN=35C/W. PD Max.=VCC Max.x ICC Max =5.5 Vx0.240=1.32 W. RPIN-A will depend on ground trace thickness, whether parts are soldered to the pcb or socketed and on air circulation. Electrical & Mechanical Considerations Interconnect Considerations Optimum product performance can be had when the following electrical and mechanical recommendations are adopted. The SCD558XA's ICs are constructed in a high speed CMOS process, consequently high speed noise on the SERIAL DATA, SERIAL DATA CLOCK, LOAD and RESET lines may cause incorrect data to be written into the serial shift register. Adhere to transmission line termination procedures when using fast line drivers and long cables (>10 cm). Good digital grounds (pins 14, 28) and power supply decoupling (pins 6, 9, 20, 23) will insure that ICC (<400 mA peak) switching currents do not generate localized ground bounce. Therefore it is recommended that each display package use a 0.1 F and 20 F capacitor between VCC and ground. When the internal MUX Clock is being used, connect the CLKSEL pin to VCC and leave CLK I/O floating. In those applica 2000 Infineon Technologies Corp. * Optoelectronics Division * San Jose, CA www.infineon.com/opto * 1-888-Infineon (1-888-463-4636) OSRAM Opto Semiconductors GmbH & Co. OHG * Regensburg, Germany www.osram-os.com * +49-941-202-7178
tions where RESET will not be connected to the system's reset control, it is recommended that this pin be connected to the center node of a series 0.1, F and 100 k RC network. Thus upon initial power up the RESET will be held low for 10 ms allowing adequate time for the system power supply to stabilize. ESD Protection The input protection structure of the SCD558XA provides significant protection against ESD damage. It is capable of withstanding discharges greater than 2.0 kV. Take all the standard precautions, normal for CMOS components. These include properly grounding personnel, tools, tables, and transport carriers that come in contact with unshielded parts. If these conditions are not, or cannot be met, keep the leads of the device shorted together or the parts in anti-static packaging. Soldering Considerations The SCD558XA can be hand soldered with SN63 solder using a grounded iron set to 260C. Wave soldering is also possible following these conditions: Preheat that does not exceed 93C on the solder side of the PC board or a package surface temperature of 85C. Water soluble organic acid flux (except carboxylic acid) or rosin-based RMA flux without alcohol can be used. Wave temperature of 245C 5C with a dwell between 1.5 sec. to 3.0 sec. Exposure to the wave should not exceed temperatures above 260C for five seconds at 0.063" below the seating plane. The packages should not be immersed in the wave. Post Solder Cleaning Procedures The least offensive cleaning solution is hot D.I. water (60C) for less than 15 minutes. Addition of mild saponifiers is acceptable. Do not use commercial dishwasher detergents. For faster cleaning, solvents may be used. Exercise care in choosing solvents as some may chemically attack the nylon package. Maximum exposure should not exceed two minutes at elevated temperatures. Acceptable solvents are TF (trichlorotrifluorethane), TA, 111 Trichloroethane, and unheated acetone. (1)
Note: 1) Acceptable commercial solvents are: Basic TF, Arklone, P. Genesolv, D. Genesolv DA, Blaco-Tron TF, Blaco-Tron TA, and Freon TA.
Unacceptable solvents contain alcohol, methanol, methylene chloride, ethanol, TP35, TCM, TMC, TMS+, TE, or TES. Since many commercial mixtures exist, contact a solvent vendor for chemical composition information. Some major solvent manufacturers are: Allied Chemical Corporation, Specialty Chemical
SCD5580/1/2/3/4 A
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March 23, 2000-18
Division, Morristown, NJ; Baron-Blakeslee, Chicago, IL; Dow Chemical, Midland, MI; E.I. DuPont de Nemours & Co., Wilmington, DE. For further information refer to Appnotes 18 and 19 at www.infineon.com/opto. An alternative to soldering and cleaning the display modules is to use sockets. Naturally, 28 pin DIP sockets .300" wide with .100" centers work well for single displays. Multiple display assemblies are best handled by longer SIP sockets or DIP sockets when available for uniform package alignment. Socket manufacturers are Aries Electronics, Inc., Frenchtown, NJ; Garry Manufacturing, New Brunswick, NJ; Robinson-Nugent, New Albany, IN; and Samtec Electronic Hardward, New Albany, IN. For further information refer to Appnote 22 at www.infineon.com/opto. Optical Considerations The 0.145" high character of the SCD558XA gives readability up to eight feet. Proper filter selection enhances readability over this distance. Using filters emphasizes the contrast ratio between a lit LED and the character background. This will increase the discrimination of different characters. The only limitation is cost. Take into consideration the ambient lighting environment for the best cost/benefit ratio for filters. Incandescent (with almost no green) or fluorescent (with almost no red) lights do not have the flat spectral response of sunlight. Plastic band-pass filters are an inexpensive and effective way to strengthen contrast ratios. The SCD5580/2A are red/high efficiency red displays and should be matched with long wavelength pass filter in the 570 nm to 590 nm range. The SCD5583/4A should be matched with a yellow-green bandpass filter that peaks at 565 nm. For displays of multiple colors, neutral density grey filters offer the best compromise.
Additional contrast enhancement is gained by shading the displays. Plastic band-pass filters with built-in louvers offer the next step up in contrast improvement. Plastic filters can be improved further with anti-reflective coatings to reduce glare. The trade-off is fuzzy characters. Mounting the filters close to the display reduces this effect. Take care not to overheat the plastic filter by allowing for proper air flow. Optimal filter enhancements are gained by using circular polarized, anti-reflective, band-pass filters. The circular polarizing further enhances contrast by reducing the light that travels through the filter and reflects back off the display to less than 1%. Several filter manufacturers supply quality filter materials. Some of them are: Panelgraphic Corporation, W. Caldwell, NJ; SGL Homalite, Wilmington, DE; 3M Company, Visual Products Division, St. Paul, MN; Polaroid Corporation, Polarizer Division, Cambridge, MA; Marks Polarized Corporation, Deer Park, NY, Hoya Optics, Inc., Fremont, CA. One last note on mounting filters: recessing displays and bezel assemblies is an inexpensive way to provide a shading effect in overhead lighting situations. Several Bezel manufacturers are: R.M.F. Products, Batavia, IL; Nobex Components, Griffith Plastic Corp., Burlingame, CA; Photo Chemical Products of California, Santa Monica, CA; I.E.E.-Atlas, Van Nuys, CA. Microprocessor Interface The microprocessor interface is through the serial port, SPI port or one out of eight data bits on the eight bit parallel port and also control lines SDCLK and LOAD. Power Up Sequence Upon power up display will come on at random. Thus the display should be reset at power-up. The reset will set the Address Register to Digit 0, User RAM is set to 0 (display blank) the Control Word is set to 0 (100% brightness with Lamp Test off) and the internal counters are reset.
Figure 11. Interface with Siemens/Intel 8031 Microprocessor (using serial port in mode 0)
VCC
28
27 DATA
23
20 19 16 SCD MASTER
15 28
27 DATA
23
2019 16 SCD SLAVE
15
+
22 F TAN .01 F
VCC 18 40 XTAL2 RXD 10 TXD 11
SD CLK LOAD
SD CLK LOAD
12
6 VCC
9
13 14
12
6
9
13 14
VCC
19 XTAL1 U1 8031 P3.7 17 9 RST P3.3 13 P3.4 14
2000 Infineon Technologies Corp. * Optoelectronics Division * San Jose, CA www.infineon.com/opto * 1-888-Infineon (1-888-463-4636) OSRAM Opto Semiconductors GmbH & Co. OHG * Regensburg, Germany www.osram-os.com * +49-941-202-7178
SCD5580/1/2/3/4 A
10
March 23, 2000-18
Figure 12. Interface with Siemens/Intel 8031 Microprocessor (using one bit of parallel port as serial input)
VCC
28
27 DATA
23
20 19 16 SCD MASTER
15 28
27 DATA
23
20 19 16 15 SCD SLAVE
+
13 14
VCC 40 P3.0 18 XTAL2 P3.1 P3.6 19 XTAL1 VCC 1 RST 9 P1.0 20 P0.0 10 11 16 39
SD CLK LOAD
SD CLK LOAD
.01 F
12
6 VCC
9
13 14
12
6
9
22 F TAN
U1 8031
Figure 13. Interface with Motorola 68HC05C4 Microprocessor (using SPI port)
VCC
28
27 DATA
23
20 19 16 SCD MASTER
15 28
27 DATA
23
20 19 16 SCD SLAVE
15
+
22 F Tan
VCC 38 40 OSC1 PA0 PA1 SCLK MOSI 11 10 33 32
SD CLK LOAD
SD CLK LOAD
.01 F
12 VCC
6
9
13 14
12
6
9
13 14
39 OSC2 VCC
U1 68HC05C4 1 RST 9 PA2 20
2000 Infineon Technologies Corp. * Optoelectronics Division * San Jose, CA www.infineon.com/opto * 1-888-Infineon (1-888-463-4636) OSRAM Opto Semiconductors GmbH & Co. OHG * Regensburg, Germany www.osram-os.com * +49-941-202-7178
SCD5580/1/2/3/4 A
11
March 23, 2000-18
Cascading Multiple Displays Multiple displays can be cascaded using the CLK SEL and CLK I/O pins as shown below. The display designated as the Master Clock source should have its CLK SEL pin tied high and the slaves should have their CLK SEL pins tied low. All CLK I/O pins should be tied together. One display CLK I/O can drive 15 slave CLK I/Os. Use RST to synchronize all display counters. Figure 14. Cascading Multiple Displays
RST VCC RST CLK I/O CLK SEL RST CLK I/O CLK SEL
Intelligent Display DATA SDCLK LOAD DATA SDCLK A0 A1 A2 A3 LD 0 Chip Address Decoder 15 CE
14 more displays in between
Intelligent Display DATA SDCLK LOAD
Address Decode 1-14
Loading Data Into the Display Use following procedure to load data into the display: 1. Power up the display. 2. Bring RST low (600 ns duration minimum) to clear the Multiplex Counter, Address Register, Control Word Register, User RAM and Data Register. The display will be blank. Display brightness is set to 100%. 3. If a different brightness is desired, load the proper brightness opcode into the Control Word Register. 4. Load the Digit Address into the display. 5. Load display row and column data for the selected digit. 6. Repeat steps 4 and 5 for all digits.
2000 Infineon Technologies Corp. * Optoelectronics Division * San Jose, CA www.infineon.com/opto * 1-888-Infineon (1-888-463-4636) OSRAM Opto Semiconductors GmbH & Co. OHG * Regensburg, Germany www.osram-os.com * +49-941-202-7178
SCD5580/1/2/3/4 A
12
March 23, 2000-18
Data Contents for the Word "Displays"
Step A B (optional) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 D7 D6 1 1 1 0 0 0 0 1 1 0 0 0 0 1 1 0 0 0 0 1 1 0 0 0 0 1 1 0 0 0 0 1 1 0 0 0 0 1 1 0 0 0 0 1 1 0 0 0 0 1 1 1 0 0 0 1 1 0 0 0 0 1 1 0 0 0 0 1 1 0 0 0 0 1 1 0 0 0 0 1 1 0 0 0 0 1 1 0 0 0 0 1 1 0 0 0 0 1 1 0 D5 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 D4 D3 0 1 0 1 1 1 1 1 0 0 0 0 0 0 0 0 1 0 0 1 0 1 1 1 1 1 0 1 1 1 1 1 0 0 0 1 1 1 0 1 0 0 0 0 0 0 1 0 0 1 0 0 0 1 0 0 0 1 0 1 0 0 0 1 0 1 0 1 0 1 0 1 0 1 0 0 0 0 0 0 0 1 0 0 1 1 0 0 0 0 1 0 0 0 0 1 0 1 0 1 D2 0 B 0 1 0 0 0 1 0 1 1 1 1 1 0 1 0 1 0 1 0 1 0 1 0 0 1 0 0 0 0 1 1 1 0 1 0 0 1 0 0 1 1 1 1 1 0 1 0 1 D1 0 B 0 1 0 0 0 1 0 1 0 0 0 1 1 1 0 1 0 1 1 1 0 1 0 0 0 0 0 0 0 1 0 0 1 1 0 0 1 0 1 0 0 0 1 1 0 1 0 1 D0 0 B 0 0 1 1 1 0 1 0 0 0 0 0 0 1 0 0 1 0 1 0 1 0 0 0 0 0 0 0 0 1 1 0 0 1 1 1 0 1 0 0 0 0 1 1 0 0 1 0 Function CLEAR BRIGHTNESS SELECT DIGIT D0 SELECT ROW 0 D0 (D) ROW 1 D0 (D) ROW 2 D0 (D) ROW 3 D0 (D) ROW 4 D0 (D) DIGIT D1 SELECT ROW 0 D1 (I) ROW 1 D1 (I) ROW 2 D1 (I) ROW 3 D1 (I) ROW 4 D1 (I) DIGIT D2 SELECT ROW 0 D2 (S) ROW 1 D2 (S) ROW 2 D2 (S) ROW 3 D2 (S) ROW 4 D2 (S) DIGIT D3 SELECT ROW 0 D3 (P) ROW 1 D3 (P) ROW 2 D3 (P) ROW 3 D3 (P) ROW 4 D3 (P) DIGIT D4 SELECT ROW 0 D4 (L) ROW 1 D4 (L) ROW 2 D4 (L) ROW 3 D4 (L) ROW 4 D4 (L) DIGIT D5 SELECT ROW 0 D5 (A) ROW 1 D5 (A) ROW 2 D5 (A) ROW 3 D5 (A) ROW 4 D5 (A) DIGIT D6 SELECT ROW 0 D6 (Y) ROW 1 D6 (Y) ROW 2 D6 (Y) ROW 3 D6 (Y) ROW 4 D6 (Y) DIGIT D7 SELECT ROW 0 D7 (S) ROW 1 D7 (S) ROW 2 D7 (S) ROW 3 D7 (S) ROW 4 D7 (S)
Note: If the display is already reset at Power Up, there is no need for Software Clear.
2000 Infineon Technologies Corp. * Optoelectronics Division * San Jose, CA www.infineon.com/opto * 1-888-Infineon (1-888-463-4636) OSRAM Opto Semiconductors GmbH & Co. OHG * Regensburg, Germany www.osram-os.com * +49-941-202-7178
SCD5580/1/2/3/4 A
13
March 23, 2000-18
User Definable Character Set Examples* Upper and Lower Case Alphabets
HEX CODE 04 2A 5F 71 91 01 21 41 71 8E 0F 30 4E 61 9E 00 2E 52 72 8D 00 26 42 72 8C 00 23 44 62 8C HEX CODE 1E 29 4E 69 9E 13 34 58 74 93 1F 24 44 64 84 10 30 5E 71 9E 10 30 56 78 96 08 3C 48 6A 84 HEX CODE 0F 30 50 70 8F 10 30 50 70 9F 11 31 51 71 8E 00 2F 50 70 8F 0C 24 44 64 8E 00 32 52 72 8D HEX CODE 1E 29 49 69 9E 11 3B 55 71 91 11 31 51 6A 84 01 21 4F 71 8F 00 2A 55 71 91 00 31 51 6A 84 HEX CODE 1F 30 5E 70 9F 11 39 55 73 91 11 31 55 7B 91 00 2E 5F 70 8E 00 36 59 71 91 00 31 55 7B 91 HEX CODE 1F 30 5E 70 90 0E 31 51 71 8E 11 2A 44 6A 91 04 2A 48 7C 88 00 2E 51 71 8E 00 32 4C 6C 92 HEX CODE 0F 30 53 71 8F 1E 31 5E 70 90 11 2A 44 64 84 00 2F 50 73 8F 00 3E 51 7E 90 00 31 4A 64 98 HEX CODE 11 31 5F 71 91 0C 32 56 72 8D 1F 22 44 68 9F 10 30 56 79 91 00 2F 51 6F 81 00 3E 44 68 9E 04 20 4C 64 8E 00 33 54 78 90 HEX CODE 0E 24 44 64 8E 1E 31 5E 74 92
DOT ON = 1 DOT OFF = 0
Numerals and Punctuation
HEX CODE 0E 33 55 79 8E 0E 31 4F 62 8C 0C 2C 48 64 80 10 28 44 62 81 0E 31 42 64 88 HEX CODE 04 2C 44 64 8E 0A 3F 4A 7F 8A 04 24 5F 64 84 1C 24 44 64 9C 06 24 48 64 86 HEX CODE 1E 21 46 68 9F 0F 34 4E 65 9E 00 2C 4C 64 88 0E 35 57 70 8E 0C 24 42 64 8C HEX CODE 1E 21 4E 61 9E 06 29 5C 68 9F 00 20 5F 60 80 00 20 40 60 9F 04 24 40 64 84 HEX CODE 06 2A 5F 62 82 19 3A 44 6B 93 00 20 40 6C 8C 0C 2C 40 6C 8C 11 2A 44 6E 84 HEX CODE 1F 30 5E 61 9E 08 34 4D 72 8D 01 22 44 68 90 0C 20 4C 64 88 15 2E 5F 6E 95 HEX CODE 06 28 5E 71 8E 0C 2C 44 68 80 04 24 44 60 84 02 24 48 64 82 04 2A 51 60 80 HEX CODE 1F 22 44 68 88 02 24 44 64 82 0A 2A 40 60 80 00 3F 40 7F 80 08 35 42 60 80 HEX CODE 0E 31 4E 71 8E 08 24 44 64 88 07 24 44 64 87 08 24 42 64 88
DOT ON = 1 DOT OFF = 0
*CAUTION: No more than 128 LEDs "on" at one time at 100% brightness.
2000 Infineon Technologies Corp. * Optoelectronics Division * San Jose, CA www.infineon.com/opto * 1-888-Infineon (1-888-463-4636) OSRAM Opto Semiconductors GmbH & Co. OHG * Regensburg, Germany www.osram-os.com * +49-941-202-7178
SCD5580/1/2/3/4 A
14
March 23, 2000-18
User Definable Character Set Examples* (continued) Scientific Notations, etc.
HEX CODE 06 2E 5E 6E 86 10 3C 52 72 81 1F 28 44 68 9F 00 24 4E 7F 8E 04 22 5F 62 84 00 27 4F 78 9C HEX CODE 04 24 48 71 8E 0E 31 5F 71 8E 18 24 48 7C 80 00 2E 5F 6E 84 04 28 5F 68 84 00 3C 5F 63 87 HEX CODE 1F 20 59 75 93 10 28 44 6A 91 1C 28 44 78 80 0E 3F 4E 64 80 1F 31 51 71 9F 00 20 40 60 83 HEX CODE 1F 20 56 79 91 09 29 49 6E 90 12 36 5A 67 80 04 3E 5F 7E 84 08 2C 4A 78 98 00 20 40 67 9F HEX CODE 0E 20 4A 64 8A 01 2E 54 64 84 06 21 5A 67 80 04 2F 5F 6F 84 0A 35 4A 75 8A 00 23 5F 7F 9F HEX CODE 0D 32 52 72 8D 04 2E 55 6E 84 07 22 59 66 80 0E 2E 4E 6E 8E 15 2A 55 6A 95 0C 3C 5C 7C 9C HEX CODE 0C 32 56 71 96 0E 31 51 6A 9B 1C 34 5C 60 80 00 3F 5F 7F 80 1F 35 5F 75 9F 15 2E 44 64 84 HEX CODE 0E 24 4E 71 8E 01 2E 5A 6A 8A 0F 28 48 78 88 04 2E 55 64 84 00 3F 5F 7C 80 HEX CODE 00 24 4A 71 9F 0F 32 52 72 8C 04 2E 5F 6E 80 04 24 55 6E 84 0E 3F 5B 7F 8E
DOT ON = 1 DOT OFF = 0
Foreign Characters
HEX CODE 1F 21 5F 62 84 08 3F 49 69 92 15 35 55 62 8C 10 3F 50 70 8F 12 32 52 64 88 0A 2E 51 7F 91 HEX CODE 1F 21 46 64 88 04 3F 44 7F 84 0E 20 5F 64 98 1F 21 41 62 8C 04 34 54 75 96 02 24 4C 64 8E HEX CODE 01 22 46 6A 82 0F 29 51 62 8C 08 28 4C 6A 88 0E 20 4E 60 8F 1E 25 4F 74 8F 04 2A 4E 71 8E HEX CODE 04 3F 51 61 86 08 2F 52 62 82 04 3F 44 64 98 04 28 51 7F 81 0F 34 5F 74 97 0A 34 52 7A 96 HEX CODE 00 3F 44 64 9F 0F 21 41 61 9F 0E 20 40 60 9F 01 21 4A 64 8A 0F 30 4F 64 98 08 24 51 71 8E HEX CODE 02 3F 46 6A 92 0A 3F 4A 62 8C 1F 21 4A 64 9A 1F 28 5F 68 87 0F 33 55 79 9E 02 24 51 71 8E HEX CODE 08 3F 49 6A 88 19 21 59 62 9C 04 3E 44 6E 95 1E 22 42 62 9F 0F 34 57 74 8F 04 2A 51 71 8E HEX CODE 1F 21 45 67 8C 0F 29 55 63 8C 04 24 44 68 90 1F 21 5F 61 9F 00 2A 5F 74 8B HEX CODE 02 3F 51 62 8C 01 3E 42 7F 86 04 22 51 71 91 0E 20 5F 61 8E 08 24 4E 72 8F
DOT ON = 1 DOT OFF = 0
*CAUTION: No more than 128 LEDs "on" at one time at 100% brightness.
2000 Infineon Technologies Corp. * Optoelectronics Division * San Jose, CA www.infineon.com/opto * 1-888-Infineon (1-888-463-4636) OSRAM Opto Semiconductors GmbH & Co. OHG * Regensburg, Germany www.osram-os.com * +49-941-202-7178 SCD5580/1/2/3/4 A
15
March 23, 2000-18

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